In a world where you have a casual conversation with your car and begin to wonder if it's already reading your mind, the automotive industry continues its intensive and ambitious collaboration with the RISC-V development community. Due to the high customizability, vehicle manufacturers can design, RISC-V is highly customizable, allowing manufacturers of vehicles to design processors tailored to their specific requirements. This adaptability is especially valuable when safety, performance, and power efficiency are critical properties. This new approach provides scalable end-to-end solutions, translating customers' needs into efficient and secure cross-domain platforms that allow for high re-use across carlines. It’s mandatory to all functional areas in the vehicle, from user experience in the cockpit, to an End-to-End vehicle network including the cloud, to automated driving and safety and motion functions.
As an integral component of the ISOLDE project, it’s a challenge for Continental Automotive to provide a high-performance computer architecture proposal versus actual existing VPU/GPU solutions. Currently incorporating the fully scalable “CV3” system-on-chip (SoC) family from semiconductor company Ambarella into our Advanced Driver Assistance Systems (ADAS). The powerful and energy efficient SoC solutions based on AI are tailored to assisted and automated driving applications and complement our portfolio. They offer more computing power, consume less energy, require less cooling and with this, save system costs.
Continental is collaborating with Infineon Technologies in the development of server-based vehicle architectures. The goal is an organized and efficient electrics/electronics (E/E) architecture with central high-performance computers (HPC) and a few, powerful Zone Control Units (ZCU) instead of up to a hundred or even more individual control units, as it was previously the case. Continental now uses Infineon’s AURIX TC4 microcontroller for its ZCU platform. Thanks to special storage technology in the AURIX TC4, the vehicle software is on standby. As soon as the vehicle is started, functions such as parking assistance, air conditioning, heating and suspension are ready within fractions of a second. With its platform approach, Continental is supporting the different requirements of the automobile manufacturers. By individually configuring the number of HPCs and ZCUs, how they interact and how they are arranged in the vehicle, automobile manufacturers can individually tailor their architecture to their needs.
Links:
https://www.eenewseurope.com/en/first-fully-coherent-risc-v-tensor-unit-...
Enabling the use of high-performance chips in safety-critical domains such as automotive, Space, and the like challenges the verification and validation of the system as a whole, and the deployment of appropriate safety measures to mitigate and manage errors. While there have been attempts to design high-performance chips where those issues, namely verification, validation and deployment of safety measures, are no more complex than in simpler designs by construction, they have not been matured and/or adopted due to multiple reasons such as limited performance, and lack of reuse of legacy IP. In this context, deploying features for verification, validation and safety measure realization while preserving legacy IP “as is” and performance unaffected becomes of paramount importance.
BSC, as part of its work in ISOLDE, is enhancing, integrating and maturing two components providing observability and controllability capabilities, as needed for verification, validation and safety measure realization. In particular, BSC contributes with the SafeSU statistics unit and the SafeTI traffic injector, which are being extended with additional capabilities to monitor components and inject traffic even in a different System-on-Chip (SoC), will be integrated as part of a Safety Island to interact with high-performance chips, and will undergo a strict validation process and include appropriate safety manuals. By providing out-of-the-band on-chip traffic monitoring and injection, misbehavior and resource abuse will be easier to be detected and reproduced, and safety measures deployed to avoid failures related to such misbehavior and resource abuse.
Both BSC components, the SafeSU and SafeTI, are specifically integrated in RISC-V SoCs and released with open source permissive licenses to ease their adoption and the development of European safety-relevant RISC-V SoCs with high-performance capabilities.
