Towards a green and digitally autonomous Europe with the ISOLDE project


Are you familiar with the medieval love story about Tristan and Isolde? Well, this is not it. We are talking about ISOLDE as in HIgh Performance, Safe, Secure, Open-Source Leveraged RISC-V Domain-Specific Ecosystems. This project kicked off in early 2023 and engages more than 40 partners from 9 different European countries. ISOLDE aims to support Europe’s digital transformation within various sectors to speed up the transition towards a green and digitally autonomous Europe. Central to this ambition is the goal of strengthening the design capacity across the EU.

Innovation for sustainability

To achieve these ambitious goals, the members of the project will create high-performance, industrial-grade processing systems and platforms based on RISC-V. Codasip’s role is to customize our existing RISC-V cores for a selected set of compute-intensive automotive applications. Firstly, we are working closely with other partners in the project to define the requirements for the tailoring of the computing architecture. Next, we will focus on application analysis and processor customization. We will of course also do extensive work on benchmarking, parametrization, and verification.
So how do we customize a processor to make it more efficient? One very effective way is to add custom instructions. But there is more to it. In addition, you can use techniques such as increasing the data throughput, parallelizing operations, or managing specific data types. Also, you can add application-related features. At Codasip, we call this Custom Compute.

Custom Compute enables innovation for sustainability. You can learn more in our recent blog post on saving the planet, one byte at a time.

How to design products differently to reduce the carbon footprint, here using a mobile phone as an example

RISC-V commercialization

A key pillar of Codasip Labs is the commercialization of innovation. This is a perfect match with the aims of the ISOLDE project.

Technology readiness level (TRL) is a method for estimating the maturity of a technology. TRLs were first introduced by NASA and have been adopted, and adapted, by the European Commission. The commission has defined the following 9 TRLs:


basic principles observed


technology concept formulated


experimental proof of concept


technology validated in lab


technology validated in relevant environment 

(industrially relevant environment in the case of key enabling technologies)


technology demonstrated in relevant environment 

(industrially relevant environment in the case of key enabling technologies)


system prototype demonstration in operational environment


system complete and qualified


actual system proven in operational environment 

(competitive manufacturing in the case of key enabling technologies; or in space)

Extract from Part 19 - Commission Decision C(2014)4995

Why am I telling you about TRLs? Well, because the ISOLDE project intends to provide RISC-V-based platforms at least at TRL 7. This means that at the end of the project in 2026, the participants will not only have created proof of concepts. Rather, we will actually have validated and demonstrated the solutions in an operational environment. This means that the project will deliver solutions that can be
used in industrial quality products. The outcome is expected to be part of actual systems within a couple of years from the project’s end date. Key application domains for the technology include automotive, space, and IoT. Surely with this ambitious aim, ISOLDE will further accelerate RISC-V commercialization.

A green and digitally autonomous Europe

An interesting aspect of ISOLDE is the included requirements to support European digital sovereignty. All participating partners are in Europe. In the end, the resulting customizable IP cores will be hosted on European servers. The more than 40 involved organizations represent large parts of EU critical chip infrastructure. This ecosystem is currently establishing the requirements and specifications for the building blocks that the project will develop.

By the time the project comes to an end, ISOLDE will have delivered a major contribution to the RISC-V ecosystem. Particularly, the project will benefit embedded high-performance computing, and contribute to the design capacity across the European chip industry.


Note: The project “ISOLDE” has received funding from the European Union HE Research and Innovation programme under grant agreement No 101112274. Codasip s.r.o, as a Czech participant in this project, is supported by the Ministry of Education, Youth and Sports.