The Industrial IoT has been an emerging market for several years now. As such, it has enabled manufacturing companies to increase production efficiency and to increase product quality. A major innovation driver is the usage of raw sensor and process data from production control systems and PLCs for downstream analytics tasks. With the convergence of Information Technology (IT) and Operational Technology (OT), many new use cases have appeared which allow to analyze fine-grained sensor data in real-time, to detect undesired situations and to apply these findings to improved process execution and optimized maintenance.
From a technical perspective, distributed edge-cloud architectures, often in combination with event-driven architectures, have emerged as the architectural paradigm of choice to realize such use cases. In these architectures, lightweight edge devices collect data directly from the shop floor (e.g., PLCs), pre-process data locally to reduce network traffic and to filter out irrelevant events and forward data to central systems (which might be at factory or cloud level) which provide the data analytics infrastructure. In addition, offloading of analytics tasks to edge nodes has recently become more popular due to increased processing power at the edge. This is especially useful for low-latency analytics applications.
Another shift in the past years was the uptake of open-source technologies in realizing such architectures. While the usage of open-source technologies is nothing new in the IT sector, with many market-dominant systems (e.g., in the Big Data world) being developed as open-source software, the manufacturing industry has started to adopt open-source technologies in their own stacks as well.
A popular open-source project in the Industrial IoT domain is Apache StreamPipes. StreamPipes is positioned as a self-service tool for flexible data analytics and realizes a development platform for industrial analytics applications. As an end-to-end toolbox, StreamPipes supports fast connectivity with a set of reusable adapters for popular industrial protocols (e.g., S7, Modbus, MQTT, OPC-UA), provides a pipeline tool to define alarming rules and notifications without programming and includes various tools for (visual) analytics. Many companies use Apache StreamPipes to gather and integrate Industrial IoT data and to run real-time analytics on continuous data streams in order to increase production efficiency, e.g., by implementing predictive maintenance applications.
Bytefabrik.AI is a technology startup from Karlsruhe, Germany with a focus on self-service manufacturing analytics applications for the Industrial IoT. The company follows an open core business model with Apache StreamPipes at its core.
Founded by the original creators of Apache StreamPipes, Bytefabrik.AI invests heavily in open-source development and contributes the latest software technologies for intelligent, real-time data analytics to the Apache StreamPipes project.
Within the ISOLDE project, Bytefabrik.AI aims to contribute substantial new features into Apache StreamPipes which will help to foster not only the RISC-V ecosystem in terms of application support in an evolving application area, but also help to develop future technological USPs for StreamPipes. We believe that RISC-V can become an important cornerstone of future Industrial IoT architectures - not only because of its open architecture. Several promises of RISC-V, e.g., energy-efficiency, ability to operate in low-power edge computing environments and low operating costs are highly relevant for distributed edge-cloud scenarios.
Planned development highlights of Bytefabrik.AI’s contributions within ISOLDE will be a lightweight edge client which will be able to stream data from source systems such as PLCs to a central Apache StreamPipes instance, an edge-cloud orchestrator to manage existing edge clients and an analytics runtime for time-series machine learning model execution. We will apply the technical outcomes to the Smart Home Demonstrator developed within ISOLDE.
We plan to make major parts of our technical achievements within ISOLDE part of Apache StreamPipes – this will ensure sustainable dissemination of project outcomes and will help to foster the RISC-V application ecosystem.
Links
Bytefabrik.AI – https://bytefabrik.ai
Apache StreamPipes – https://streampipes.apache.org
The automotive domain has witnessed a remarkable transformation in recent years, primarily driven by the pervasive integration of embedded systems. These specialized computer systems are the linchpin of modern vehicles, revolutionizing their performance, safety, and efficiency. In the context of motor control scenarios, the adoption of the RISC-V architecture stands out as a significant milestone. RISC-V, an open and extensible instruction set architecture (ISA), has gained prominence for its adaptability, modularity, and flexibility. It offers an innovative approach to addressing the intricate requirements of motor control in the automotive industry.
One significant extension of the RISC-V architecture for motor control is the incorporation of a vector accelerator unit (VAU). These VAUs provide the ability to execute parallel processing operations more efficiently, which is highly advantageous in motor control applications. By leveraging vector accelerator units, embedded systems can achieve improved computational performance and optimize energy consumption. The extension of RISC-V with VAUs empowers embedded systems to handle the intricate mathematics and algorithms required for motor control, contributing to improved performance and reduced energy consumption.
The aim to further optimize the RISC-V embedded architecture for the automotive domain is closely connected with the utilization of Power, Performance, and Area (PPA) analysis, as it turns out to be a crucial factor on the way to the deployment of an efficient solution. PPA analysis offers a comprehensive evaluation of the system's power efficiency, computational performance, and hardware area utilization. This analytical approach aids in fine-tuning the embedded system's architecture to strike an optimal balance between these critical parameters. By leveraging PPA analysis, engineers can design embedded systems that meet the stringent requirements of motor control while minimizing power consumption and overall hardware footprint.
The role of the ISOLDE project team from Brno University of Technology (BUT) from Czech Republic aims at the PPA optimization possibilities of a custom compute automotive instruction accelerator with vector processing capabilities, which represents an extension of RISC-V based target architecture developed in a close collaboration with the Codasip company (another Czech partner of the ISOLDE project). Obviously, the partnership between an academic institution and commercial company will be leveraged in that context.
The intended way of PPA optimization is two-fold. First, profiling of the processor setup (RISC-V core and accelerator unit) will be performed in Codasip Studio development tool with a special attention given to the Instruction Set Architecture (ISA) regarding:
Then, further optimization steps can be taken on so called Register Transfer Level (RTL) representation of the target embedded architecture. The capability of Codasip Studio to produce SystemVerilog representation of the whole hardware setup plays an important role here. Such kind of hardware description can be analyzed using Synopsys toolset, e.g. Design Compiler and RTL Architect, together with the help of ASIC technology libraries. Such an approach allows to refine the target architecture on a near-physical level with accurate power estimation, timing constraints and estimation of the floor area needed.
The advantages of this integrated approach accompanied by thorough PPA analysis and optimization steps are multifaceted. First, the adoption of RISC-V architecture with VAUs significantly enhances the processing power, enabling sophisticated control algorithms and real-time responses for motor control applications. Second, the extensibility and modularity of RISC-V make it adaptable to evolving motor control standards and requirements, facilitating future-proof designs. Lastly, PPA analysis-driven optimizations ensure that the embedded systems strike an optimal balance between performance, energy efficiency, and hardware utilization, thereby contributing to sustainable and reliable automotive solutions.
Links
Brno University of Technology (BUT) – https://www.fit.vutbr.cz
Development toolset by Codasip – https://codasip.com/products/codasip-studio/
Logic synthesis tools by Synopsys - https://www.synopsys.com/implementation-and-signoff/rtl-synthesis-test.html
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In a world where you have a casual conversation with your car and begin to wonder if it's already reading your mind, the automotive industry continues its intensive and ambitious collaboration with the RISC-V development community. Due to the high customizability, vehicle manufacturers can design, RISC-V is highly customizable, allowing manufacturers of vehicles to design processors tailored to their specific requirements. This adaptability is especially valuable when safety, performance, and power efficiency are critical properties. This new approach provides scalable end-to-end solutions, translating customers' needs into efficient and secure cross-domain platforms that allow for high re-use across carlines. It’s mandatory to all functional areas in the vehicle, from user experience in the cockpit, to an End-to-End vehicle network including the cloud, to automated driving and safety and motion functions.
As an integral component of the ISOLDE project, it’s a challenge for Continental Automotive to provide a high-performance computer architecture proposal versus actual existing VPU/GPU solutions. Currently incorporating the fully scalable “CV3” system-on-chip (SoC) family from semiconductor company Ambarella into our Advanced Driver Assistance Systems (ADAS). The powerful and energy efficient SoC solutions based on AI are tailored to assisted and automated driving applications and complement our portfolio. They offer more computing power, consume less energy, require less cooling and with this, save system costs.
Continental is collaborating with Infineon Technologies in the development of server-based vehicle architectures. The goal is an organized and efficient electrics/electronics (E/E) architecture with central high-performance computers (HPC) and a few, powerful Zone Control Units (ZCU) instead of up to a hundred or even more individual control units, as it was previously the case. Continental now uses Infineon’s AURIX TC4 microcontroller for its ZCU platform. Thanks to special storage technology in the AURIX TC4, the vehicle software is on standby. As soon as the vehicle is started, functions such as parking assistance, air conditioning, heating and suspension are ready within fractions of a second. With its platform approach, Continental is supporting the different requirements of the automobile manufacturers. By individually configuring the number of HPCs and ZCUs, how they interact and how they are arranged in the vehicle, automobile manufacturers can individually tailor their architecture to their needs.
Links:
https://www.eenewseurope.com/en/first-fully-coherent-risc-v-tensor-unit-...
Enabling the use of high-performance chips in safety-critical domains such as automotive, Space, and the like challenges the verification and validation of the system as a whole, and the deployment of appropriate safety measures to mitigate and manage errors. While there have been attempts to design high-performance chips where those issues, namely verification, validation and deployment of safety measures, are no more complex than in simpler designs by construction, they have not been matured and/or adopted due to multiple reasons such as limited performance, and lack of reuse of legacy IP. In this context, deploying features for verification, validation and safety measure realization while preserving legacy IP “as is” and performance unaffected becomes of paramount importance.
BSC, as part of its work in ISOLDE, is enhancing, integrating and maturing two components providing observability and controllability capabilities, as needed for verification, validation and safety measure realization. In particular, BSC contributes with the SafeSU statistics unit and the SafeTI traffic injector, which are being extended with additional capabilities to monitor components and inject traffic even in a different System-on-Chip (SoC), will be integrated as part of a Safety Island to interact with high-performance chips, and will undergo a strict validation process and include appropriate safety manuals. By providing out-of-the-band on-chip traffic monitoring and injection, misbehavior and resource abuse will be easier to be detected and reproduced, and safety measures deployed to avoid failures related to such misbehavior and resource abuse.
Both BSC components, the SafeSU and SafeTI, are specifically integrated in RISC-V SoCs and released with open source permissive licenses to ease their adoption and the development of European safety-relevant RISC-V SoCs with high-performance capabilities.
ISOLDE Project will have high performance RISC-V processing systems and platforms at least at TRL 7 for the vast majority of building blocks, demonstrated for key European application domains such as automotive, space and IoT with the expectation that two years after completion ISOLDE’s high performance components will be used in industrial quality products.
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